
R2J20702NP Target Specification
REJ03G1782-0401 Rev.4.01 Page 3 of 27
Jun 17, 2010
Block Diagram
50 k
50 k
Active
current
sensing
S
R
Q
Q
OCP comparator
Error A mp.
OSC
Pulse generator
RES
Max. Duty
(Bi-lateral)
RES
Max. Duty
50 ns
55 ns
Blanking
UVLO
5 V (4%)
Regulator
ON/OFF
Gate drive
logic
circuit
OCP
PWM
ON/OFF
BOOTREG5ON/OFF
IREF
CT
SYNC
TRK-SS
FB
EO
DRV5
Idh
Idh
22000
SBD
VOUT
Current
sense
comparator
REG5
1.5 V
OCP
hiccup
control
0.6 V (1%)
REG5
OCP
REG GOOD
ON/OFF
(1024 pulses blank)
VCIN
0.1 V
490 µA
Supervisor
5.25 V (4%)
Regulator
DRV5
VIN
Ishare
RAMP CS
PGND
SW
SGND
8 V to 14 V
VOUT
Reference
current
generator
REG GOOD
REG GOOD
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